TASK PROCESSING METHOD AND CHIP

The embodiments of the present application relate to the technical field of computers. Provided are a task processing method and a chip. The task processing method comprises: respectively putting, into a plurality of instruction queues which correspond to a plurality of execution units on a one-to-one basis, all instructions in an instruction sequence that are used for implementing a task; according to a relationship identifier corresponding to a restriction instruction at the head of a first instruction queue among the plurality of instruction queues, determining a processing state of a second instruction queue that the first instruction queue depends on in a data dependency relationship indicated by the relationship identifier, and when the processing state indicates that processing is completed, taking out the restriction instruction corresponding to the relationship identifier from the first instruction queue, so as to execute an instruction subsequent to the restriction instruction, wherein the processin