COORDINATED OPTIMIZATION METHOD FOR IGBT SPIKE VOLTAGE SUPPRESSION
Disclosed in the present invention is a coordinated optimization method for IGBT spike voltage suppression, comprising the following steps: establishing an equivalent model of a mining frequency converter main topology having a stray inductance; establishing a behavior model of an IGBT; establishing...
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Format: | Patent |
Sprache: | chi ; eng ; fre |
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Zusammenfassung: | Disclosed in the present invention is a coordinated optimization method for IGBT spike voltage suppression, comprising the following steps: establishing an equivalent model of a mining frequency converter main topology having a stray inductance; establishing a behavior model of an IGBT; establishing a correspondence between structural parameters of a busbar and the stray inductance; establishing a correspondence between the structural parameters of the busbar and an IGBT spike voltage and a correspondence between the structural parameters of the busbar and IGBT power loss; establishing a correspondence of a gate driving resistance and the structural parameters of the busbar with the IGBT spike voltage and a correspondence of the gate driving resistance and the structural parameters of the busbar with the IGBT power loss; determining an optimal solution of snubber capacitance; and using the gate driving resistance and the structural parameters of the busbar as decision variables to perform multi-objective extr |
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