ANALOG-TO-DIGITAL CONVERTER WITH GRAY COUNTER
The present technology relates to an analog-to-digital converter, ADC (100), comprising: a plurality of ADC circuits (110 , ..., 110, 110, ..., 110), each ADC circuit (110 , ..., 110, ..., 110, ..., 110) being associated to a pixel group of an pixel array and comprising a storage circuit (120 , ...,...
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Zusammenfassung: | The present technology relates to an analog-to-digital converter, ADC (100), comprising: a plurality of ADC circuits (110 , ..., 110, 110, ..., 110), each ADC circuit (110 , ..., 110, ..., 110, ..., 110) being associated to a pixel group of an pixel array and comprising a storage circuit (120 , ..., 120, ..., 120, ..., 120) comprising a plurality of storage cells (122, 124), a shared counter circuit (130) having a counter control connection (C131, C133) to apply a clock signal (S2) and a plurality of counter output connections (CO_130R , ..., CO_130R, CO_130F , ..., CO_130F), the shared counter circuit (130) being configured to generate a respective counter bit (CNTR , ..., CNTR, CNTF , ..., CNTF) in response to a counter state of the counter circuit (130), wherein a respective one of the storage cells (122, 124) is connected to a respective one of the counter output connections (CO_130R , ..., CO_130R, CO_130F , ..., CO_130F) for storing the respective counter bit (CNTR , ..., CNTR, CNTF , ..., CNTF), wherein the shared counter circuit (130) comprises a Gray ripple counter (132, 134), and a delay circuit (140), the delay circuit being arranged on at least one of the counter output connections (CO_130R , ..., CO_130R, CO_130F , ..., CO_130F) between the counter circuit (130) and a corresponding storage cell (122, 124) and being configured to add to at least one counter bit (CNTR , ..., CNTR, CNTF , ..., CNTF) a bit-specific delay (b_D) to account for a ripple delay introduced by the Gray ripple counter (132, 134).
La présente technologie concerne un convertisseur analogique-numérique, CAN (100), comprenant : une pluralité de circuits CAN (110 , ..., 110 , 110, ..., 110), chaque circuit CAN (110 , ..., 110, ..., 110, ..., 110) étant associé à un groupe de pixels d'un réseau de pixels et comprenant un circuit de stockage (120 , ..., 120, ..., 120, ..., 120) qui comporte une pluralité de cellules de stockage (122, 124), un circuit compteur partagé (130) ayant une connexion de commande de compteur (C131, C133) pour appliquer un signal d'horloge (S2) et une pluralité de connexions de sortie de compteur (CO_130R , ..., CO_130R, CO_130F , ..., CO_130F), le circuit de compteur partagé (130) étant configuré pour générer un bit de compteur respectif (CNTR , ..., CNTR, CNTF |
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