PREPARATION METHOD FOR POLYIMIDE VIA AND WAFER LEVEL SEMICONDUCTOR PACKAGING STRUCTURE

The present invention provides a preparation method for a polyimide via, and a wafer-level semiconductor packaging structure. The preparation method for the polyimide via comprises: S1: providing a substrate having a metal pad attached to a surface; S2: forming a polyimide layer on the substrate; S3...

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Hauptverfasser: YIN, Jiashan, ZHOU, Zuyuan, LIN, Chengchung, LIU, Xiang, XUE, Xingtao
Format: Patent
Sprache:chi ; eng ; fre
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Zusammenfassung:The present invention provides a preparation method for a polyimide via, and a wafer-level semiconductor packaging structure. The preparation method for the polyimide via comprises: S1: providing a substrate having a metal pad attached to a surface; S2: forming a polyimide layer on the substrate; S3: forming a metal layer on the polyimide layer; S4: forming a preset layer on the metal layer, and forming a first pre-via on the preset layer; S5: etching the metal layer to form a second pre-via; S6: etching the polyimide layer to form a third pre-via; S7: removing all structures on the polyimide layer, so as to form a polyimide via on the polyimide layer. The present invention avoids the problem of residue remaining at the bottom part of a small-sized polyimide via, ensuring a basically consistent top-to-bottom contour of the polyimide via, and the preparation process is refined, thereby improving product yield. In wafer-level semiconductor packaging, a relatively small polyimide via can allow for more intricate