METHOD FOR FORMING CHIP PACKAGE STRUCTURE
Provided in the present invention is a method for forming a chip package structure, comprising: providing a plurality of dies carried on a stretchable layer, the arrangement of the dies on the stretchable layer maintaining the arrangement of a wafer after dicing; stretching the stretchable layer unt...
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Format: | Patent |
Sprache: | chi ; eng ; fre |
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Zusammenfassung: | Provided in the present invention is a method for forming a chip package structure, comprising: providing a plurality of dies carried on a stretchable layer, the arrangement of the dies on the stretchable layer maintaining the arrangement of a wafer after dicing; stretching the stretchable layer until the distance between adjacent dies is a preset distance; transferring the stretched stretchable layer and the carried dies as a whole to a carrier plate; removing the stretched stretchable layer; forming a plastic packaging layer on the carrier plate so as to cover the dies; removing the carrier plate; forming an electrical connection structure on the active surfaces of the dies and the plastic packaging layer; and dicing to form a plurality of chip package structures, each chip package structure at least comprising one die. According to an embodiment of the present invention, (1) by using the stretchable layer, a plurality of dies after wafer dicing can be transferred in one step, and the attachment efficiency |
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