MODULE ARRANGEMENT METHOD FOR CHIP AND RELATED DEVICE

The present application relates to the field of chip layout, and discloses a module arrangement method for a chip. The method comprises: obtaining a first constraint of a plurality of circuit modules of a target chip; according to a first target, arranging the plurality of circuit modules in the target chip to obtain a first chip arrangement, wherein during arrangement, the first constraint is used as a soft constraint of the plurality of circuit modules; and according to a second target, using the first constraint as a hard constraint of an arrangement between the plurality of circuit modules, and adjusting the arrangement of the plurality of circuit modules in the first chip arrangement to obtain a second chip arrangement. The present application uses the first constraint as the soft constraint for primary chip arrangement, then uses the first constraint as the hard constraint, and finely adjusts a chip arrangement result, so that when the length of a wire between the circuit modules is optimized, it can be