A METHOD FOR MANUFACTURING A SUBSTRATE WAFER FOR BUILDING GROUP III-V DEVICES THEREON AND A SUBSTRATE WAFER FOR BUILDING GROUP III-V DEVICES THEREON

A METHOD FOR MANUFACTURING A SUBSTRATE WAFER FOR BUILDING GROUP III-V DEVICES THEREON AND A SUBSTRATE WAFER FOR BUILDING GROUP III-V DEVICES THEREON

A method for manufacturing a substrate wafer for building group III-V devices thereon, comprising providing a silicon single crystal wafer; forming a gettering region below a top surface of the silicon single crystal wafer; forming a nitrogen enriched passivation layer representing a top portion of...

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Bibliographische Detailangaben
Hauptverfasser: THAPA, Sarad Bahadur, MURPHY, Brian
Format: Patent
Sprache:eng ; fre
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A method for manufacturing a substrate wafer for building group III-V devices thereon, comprising providing a silicon single crystal wafer; forming a gettering region below a top surface of the silicon single crystal wafer; forming a nitrogen enriched passivation layer representing a top portion of the substrate wafer. L'invention concerne un procédé de fabrication d'une tranche de substrat pour construire des dispositifs du groupe III-V sur celle-ci, qui consiste à utiliser une tranche de silicium monocristallin ; former une région de piégeage au-dessous d'une surface supérieure de la tranche de monocristal de silicium ; former une couche de passivation enrichie en azote représentant une partie supérieure de la tranche de substrat.