METHOD FOR INSPECTING CODE UNDER WEAK MEMORY ORDER ARCHITECTURE, AND CORRESPONDING DEVICE

Disclosed is a method for inspecting code under a weak memory order architecture, comprising: obtaining a first source code and a test code, the first source code comprising a blocking marker, the first source code corresponding to multiple threads, and the multiple threads having at least one share...

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Hauptverfasser: FU, Ming, OBERHAUSER, Jonas, BEHRENS, Diogo, WEN, Yuzhong
Format: Patent
Sprache:chi ; eng ; fre
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Zusammenfassung:Disclosed is a method for inspecting code under a weak memory order architecture, comprising: obtaining a first source code and a test code, the first source code comprising a blocking marker, the first source code corresponding to multiple threads, and the multiple threads having at least one shared memory; according to a condition indicated by the test code, and the first source code, generating multiple execution flows under a weak memory order architecture for the multiple threads operating the same shared memory, wherein a busy-wait loop is present in a target execution flow containing the blocking marker among the multiple execution flows; if, when calling the multiple threads to execute the busy-wait loop in the target execution flow, a read operation executed by a target thread in one busy-wait loop refers to less than one non-referenced write operation, then determining that the busy-wait loop in the target execution flow is a dead loop. In the solution provided in the present application, the target