LADDER DIAGRAM-BASED PLC INSTRUCTION QUALITY DETECTION METHOD, AND TERMINAL

Disclosed are a ladder diagram-based programmable logic controller (PLC) instruction quality detection method, and a terminal. In the present invention, the method comprises: reading a PLC instruction to be tested in a test case, to acquire a program file path of a PLC, writing the PLC instruction t...

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Bibliographische Detailangaben
Hauptverfasser: OU, Xinmu, HUANG, Jibo, LAI, Yongzhen, TAO, Yanjie
Format: Patent
Sprache:chi ; eng ; fre
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Zusammenfassung:Disclosed are a ladder diagram-based programmable logic controller (PLC) instruction quality detection method, and a terminal. In the present invention, the method comprises: reading a PLC instruction to be tested in a test case, to acquire a program file path of a PLC, writing the PLC instruction to be tested into the PLC to obtain a PLC program; turning on a ladder diagram, the ladder diagram executing the PLC program according to preset test data in the test case, comparing an execution result with a theoretical result in the preset test data to obtain a test result, and writing the test result into a test result field of the corresponding instruction in the test case; and repetitively executing the steps S1 and S2 until all the PLC instructions to be tested in the test case are tested, and generating a test report according to the test case and outputting same. In the present invention, a PLC instruction set is tested by means of a ladder diagram, without the need for manual intervention, improving the te