INSTRUCTION, CIRCUITS, AND LOGIC FOR GRAPH ANALYTICS ACCELERATION

A processor includes a front end including circuitry to receive and decode an instruction. The instruction is to perform a graph analytic function and pass the instruction to a graph accelerator. The graph accelerator including circuitry to process graph vertices and graph edges as datatypes, execut...

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Bibliographische Detailangaben
Hauptverfasser: SUNDARAM, Narayanan, WU, Lisa K, HAM, Tae Jun, SATISH, Nadathur Rajagopalan
Format: Patent
Sprache:eng ; fre
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