SELECTIVE FLUSHING OF INSTRUCTIONS IN AN INSTRUCTION PIPELINE IN A PROCESSOR BACK TO AN EXECUTION-RESOLVED TARGET ADDRESS, IN RESPONSE TO A PRECISE INTERRUPT

Selective flushing of instructions in an instruction pipeline in a processor back to an execution-determined target address in response to a precise interrupt is disclosed. A selective instruction pipeline flush controller determines if a precise interrupt has occurred for an executed instruction in...

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Bibliographische Detailangaben

Hauptverfasser:	CAIN, Harold, Wade, III, AL SHEIKH, Rami, Mohammad, KOTHINTI NARESH, Vignyan Reddy
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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