METHOD FOR GENERATING AN ELECTRONIC CIRCUIT MODELLING SUBSTRATE COUPLING EFFECTS IN AN INTEGRATED CIRCUIT

METHOD FOR GENERATING AN ELECTRONIC CIRCUIT MODELLING SUBSTRATE COUPLING EFFECTS IN AN INTEGRATED CIRCUIT

The present invention relates to design and manufacture of integrated circuits and more particularly to electrical modelling of integrated circuits combining high voltage power devices with low voltage control logic blocks, and even more particularly, the modelling of substrate coupling effects in t...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MOURSY, Yasser, ISKANDER, Ramy, ZOU, Hao
Format: Patent
Sprache:eng ; fre
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:The present invention relates to design and manufacture of integrated circuits and more particularly to electrical modelling of integrated circuits combining high voltage power devices with low voltage control logic blocks, and even more particularly, the modelling of substrate coupling effects in these circuits. La présente invention concerne la conception et la fabrication de circuits intégrés et, plus particulièrement, une modélisation électrique de circuits intégrés combinant des dispositifs de puissance haute tension avec des blocs logiques de commande basse tension et, plus particulièrement encore, la modélisation d'effets de couplage de substrat dans ces circuits.