EXCEPTION HANDLING METHOD AND APPARATUS
An exception handling method and apparatus. The method comprises: detecting whether an exception has occurred in a process of accessing a PCI-E memory space (S102); if so, setting a return value corresponding to an exception instruction causing the exception as an illegal value (S104); and taking th...
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Format: | Patent |
Sprache: | chi ; eng ; fre |
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Zusammenfassung: | An exception handling method and apparatus. The method comprises: detecting whether an exception has occurred in a process of accessing a PCI-E memory space (S102); if so, setting a return value corresponding to an exception instruction causing the exception as an illegal value (S104); and taking the next address of the exception instruction as a return address of the current exception (S106). Using the technical solution solves the problems in the related art that the occurrence of an exception in the process of accessing a pcie memory address causes the procedure to stop and a system halts due to an endless loop, thereby improving the robustness and survivability of the system.
La présente invention concerne un appareil et un procédé de gestion d'exception. Le procédé comprend les étapes consistant : à détecter si une exception s'est produite dans un procédé d'accès à un espace mémoire d'interconnexion de composants périphériques express (PCI-E) (S102) ; si c'est le cas, à régler une valeur de retour corres |
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