BREAKDOWN ANALYSIS OF GEOMETRY INDUCED OVERLAY AND UTILIZATION OF BREAKDOWN ANALYSIS FOR IMPROVED OVERLAY CONTROL

Systems and methods for providing improved measurements and predictions of geometry induced overlay errors are disclosed. Information regarding variations of overlay errors is obtained and analyzed to improve semiconductor processes as well as lithography patterning. In some embodiments, a cascading...

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Bibliographische Detailangaben

Hauptverfasser:	VEERARAGHAVAN, SATHISH, HUANG, CHINOU (KEVIN)
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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