MULTI-CORE NETWORK PROCESSOR INTERCONNECT WITH MULTI-NODE CONNECTION

According to at least one example embodiment, a method of data coherence is employed within a multi-chip system to enforce cache coherence between chip devices of the multi-node system. According at least one example embodiment, a message is received by a first chip device of the multiple chip devic...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	FALDAMIS, GEORGIOS, DOBBIE, BRADLEY D, PERVEILER, JOHN M, ASHER, DAVID H, OLIVEIRA, CHARLES M, AKKAWI, ISAM, KESSLER, RICHARD E
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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