A METHOD, APPARATUS AND SYSTEM FOR DYNAMICALLY CONTROLLING AN ADDRESSING MODE FOR A CACHE MEMORY

In an embodiment, a first portion of a cache memory is associated with a first core. This first cache memory portion is of a distributed cache memory, and may be dynamically controlled to be one of a private cache memory for the first core and a shared cache memory shared by a plurality of cores (in...

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Bibliographische Detailangaben

Hauptverfasser:	WANG, KEBING, BIAN, ZHAOJUAN, ZHOU, WEI, WANG, ZHIHONG
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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