DUAL BOOT SYSTEM WITH MEMORY AREA SWAPPING MECHANISM

A central processing unit with dual boot capabilities is disclosed comprising an instruction memory further comprising a first and second memory area which are configured to be individually programmable, wherein first and second memory area can be assigned to an active memory from which instructions...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	WOJEWODA, IGOR, CATHERWOOD, MICHAEL, I, IVEY, BRANT, MICKEY, DAVID, KANELLOPOULOS, JOSEPH
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!