LOW VOLTAGE ISOLATION SWITCH, IN PARTICULAR FOR A TRANSMISSION CHANNEL FOR ULTRASOUND APPLICATIONS

A low voltage isolation switch (1) is described, inserted between an input terminal (HVout) suitable for receiving a high voltage signal (IM) and an output terminal (pzt) suitable for transmitting this high voltage signal (IM) to a load (PZ) of the type comprising at least one driving block (5) being inserted between a first and a second voltage reference (Vss, -Vss) and comprising a first driving transistor (M1), inserted, in series to a first driving diode (D1), between the first voltage reference (Vss) and a first driving central circuit node (Xd) and a second driving transistor (M2), in turn inserted, in series with a second driving diode (D2), between the driving central circuit node (Xd) and the second supply voltage reference (-Vss) as well as a control transistor (MD) connected across a diode block (7) comprising at least one first and one second transmission diode (DN1, DN2), connected in antiparallel, i.e. by having the anode terminal of the first diode connected to the cathode terminal of the second one and vice versa, between the input (HVout) and output (pzt) terminals of the low voltage isolation switch (1), this control transistor (MD) having a control terminal connected to the driving central circuit node (Xd) through a low voltage decoupling block (6), in turn inserted between a first and a second substrate terminal (SS1, SS2) and also comprising a first and a second parasite capacitive element (Par1, Par2) connected to these first and second substrate terminals (SS1, SS2) as well as comprising at least one first decoupling transistor (M3) and one second decoupling transistor inserted (M4), being in parallel to each other and having control terminals connected to the first and second parasite capacitive elements (Par1, Par2), respectively. L'invention concerne un circuit d'isolation pour basse tension (1), inséré entre une borne d'entrée (Hvout) conçue pour recevoir un signal haute tension (IM) et une borne de sortie (pzt) conçue pour délivrer le signal haute tension (IM) à une charge (PZ) du type comprenant au moins un bloc d'attaque (5) inséré entre une première et une seconde référence de tension (Vss, -Vss) et comprenant un premier transistor d'attaque (M1), monté en série avec une première diode d'attaque (D1) et inséré entre la première référence de tension (Vss) et un premier noeud de circuit central d'attaque (Xd), et un second transistor d'attaque (M2), monté en série avec une seconde diode d'attaque (D2), et inséré à son tour ent