OPERAND ADDRESS GENERATION

A processor includes at least one execution unit that executes instructions, at least one register file, coupled to the at least one execution unit, that buffers operands for access by the at least one execution unit, and an instruction sequencing unit that fetches instructions for execution by the...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	SINHAROY, BALARAM, ARIMILLI, RAVI, KUMAR
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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