SYSTEM AND METHOD FOR AN EFFICIENT COMPARISON OPERATION OF MULTI-BIT VECTORS IN A DIGITAL LOGIC CIRCUIT

An improved technique that considerably reduces required logic and computational time for determining whether the difference between two multi-bit vectors is equal to a given number or lies between given two numbers in a digital logic circuit. In one example embodiment, this is accomplished by recei...

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1. Verfasser: GIRI, ABHIJIT
Format: Patent
Sprache:eng ; fre
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