USE OF RECOVERY TRANSISTORS DURING WRITE OPERATIONS TO PREVENT DISTURBANCE OF UNSELECTED CELLS

A memory array and method for performing a write operation in a memory array that eliminates parasitic coupling between selected and unselected bitlines and protects memory cells on unselected bitlines. A memory array (100); has a plurality of memory cells (148, 150,152, 154), each of which is coupl...

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Bibliographische Detailangaben

Hauptverfasser:	PANG, RICHARD, F, CURRY, DUNCAN, LAMBRACHE, EMIL
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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