INTELLIGENT CAMERA CIRCUIT AND IMAGE PROCESSING CIRCUIT AND METHOD

An image processing circuit of an intelligent camera apparatus comprises image data processing circuits (12, 13, 16, 15) interconnected by a shared communication bus(10). The image data processing circuits (12, 13, 16, 15) include a programmable stream processing circuit (13) and a reconfigurable ci...

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Hauptverfasser: KLEIHORST, RICHARD, P, VAN BAKEL, MARTINUS, J., P, BROERS, HARRY, BENNEBROEK, MARTIJN, T, RAEDTS, PETER, J., A, SCHUELER, JOHANNES, B
Format: Patent
Sprache:eng ; fre
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Zusammenfassung:An image processing circuit of an intelligent camera apparatus comprises image data processing circuits (12, 13, 16, 15) interconnected by a shared communication bus(10). The image data processing circuits (12, 13, 16, 15) include a programmable stream processing circuit (13) and a reconfigurable circuit (18). The programmable stream processing circuit (13) operates by translating all pixel location dependence of program instructions to dependence on pixel position in a stream of pixel values that is transmitted via the communication bus (10). The reconfigurable circuit (16) can be reconfigured at run time with configurations of a type that affects pixel value processing as well as data dependent pixel addressing involved with said pixel value processing. A run-time command is received to perform a selectable mix of image processing operations including an image stream based operation and a data driven access operation that involves intra-image addressing of pixel values with data driven addresses. In response to the command the programmable stream processing circuit (13) is programmed to perform the image stream based operation and configuration data is loaded into the reconfigurable circuit (16). The loaded configuration data configures the reconfigurable circuit (16) to perform the data driven access operation, including reconfigured data driven intra image selection of addresses for commanding selective transmission of the pixel values for addressed pixel locations over the communication bus (10). La présente invention concerne un circuit de traitement d'image destiné à un système de caméra intelligente, et comprenant des circuits de traitement de données d'image (12, 13, 16, 15) interconnectés par un bus de communication partagé (10). Les circuits de traitement de données d'image (12, 13, 16, 15) comprennent un circuit de traitement de train de données programmable (13) et un circuit reconfigurable (18). Le circuit de traitement de train de données programmable (13) fonctionne en réalisant une translation de toute corrélation entre les emplacements de pixel d'instructions de programme, en corrélation entre les position de pixel dans un train de valeurs de pixel qui est transmis par le bus de communication (10). Le circuit reconfigurable (16) peut être reconfiguré pendant le temps d'exécution avec des configurations d'un certain type qui agit sur le traitement des valeurs de pixel ainsi que sur l'adressage des pixels dépendant des données, impliqué dan