LOW JITTER PHASE-LOCKED LOOP WITH DUTY-CYCLE CONTROL

A timing circuit (700) for ATE generates an output clock (710a) from an input clock and controls output pulse width. The timing circuit includes a differential driver (710) having an input that receives the input clock, and having inverting and non-inverting outputs. The inverting output is coupled...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	HUTNER, MARC, R, SABIL, ABDELKEBIR, O'BRIEN, DAVID, E, MITTELBRUNN, MICHAEL, A, SHEEN, TIMOTHY, W
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PULSE TECHNIQUE TESTING
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