Implantable N-phasic defibrillator output bridge circuit

An output bridge circuit comprising four independently controlled transistors connected between first and second electrode terminals and a defibrillation capacitor. Two of the four transistors are driven by push-pull driver circuits and connected between the capacitor and the first and second electrode terminals. The remaining two transistors are connected between the first and second electrode terminals and ground terminals. By triggering one of the transistors connected to the push-pull driver circuits and one of the transistors connected between the electrode terminals and the ground terminal, a mono-phasic, multi-phasic, or sequential defibrillation pulse can be generated by activating the appropriate transistors.