Dynamic current limit circuit

A system is disclosed which provides a dynamic current limit circuit that accurately defines both the lower and the upper limits for the current limit. The circuit ensures both the lower and upper current limits are well-controlled. The lower current limit is matched to the normal pulse-frequency mo...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	Childs, Mark, Masuch, Jens, Faerber, Martin, de Vita, Giulio
Format:	Patent
Sprache:	eng
Schlagworte:	APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING CONTROL OR REGULATION THEREOF CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER DECODING ELECTRICITY GENERATION
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Beschreibung
Zusammenfassung:	A system is disclosed which provides a dynamic current limit circuit that accurately defines both the lower and the upper limits for the current limit. The circuit ensures both the lower and upper current limits are well-controlled. The lower current limit is matched to the normal pulse-frequency modulation (PFM) limit, and the upper current limit is matched to the pulse-width modulation (PWM) limit. This implementation has several key benefits, including making the peak current limit accurate in both sync and dynamic sleep modes. If the scheme is carefully designed, the dynamic sleep current limit gives the best load transient response.