Semiconductor package and method for fabricating the same

A semiconductor package includes a stack structure, a mold layer disposed on at least one sidewall of the stack structure, a redistribution line electrically connected to the stack structure, and an external terminal electrically connected to the redistribution line. The stack structure includes a s...

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Bibliographische Detailangaben
Hauptverfasser: Ryu, Seung-Kwan, Kwon, Yonghwan
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A semiconductor package includes a stack structure, a mold layer disposed on at least one sidewall of the stack structure, a redistribution line electrically connected to the stack structure, and an external terminal electrically connected to the redistribution line. The stack structure includes a semiconductor chip having an active surface and a non-active surface opposite to the active surface. A dummy substrate is disposed on the non-active surface of the semiconductor chip. An adhesive layer is disposed between the dummy substrate and the semiconductor chip. The mold layer includes a top surface adjacent to the redistribution line and a bottom surface opposite to the top surface. The dummy substrate is exposed through the bottom surface of the mold layer.