Isolator with reduced susceptibility to parasitic coupling

A capacitive isolation system, capacitive isolator, and method of operating the same are disclosed. The capacitive isolation system is described to include a first semiconductor die and a second semiconductor die each having capacitive elements established thereon and positioned in a face-to-face co...

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Bibliographische Detailangaben
Hauptverfasser: Chang, Kwee Chong, Misek, Brian J, Lee, Kah Weng, Ho, Dominique
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A capacitive isolation system, capacitive isolator, and method of operating the same are disclosed. The capacitive isolation system is described to include a first semiconductor die and a second semiconductor die each having capacitive elements established thereon and positioned in a face-to-face configuration. An isolation layer is provided between the first and second semiconductor die so as to establish an isolation boundary therebetween. Capacitive coupling is used to carry information across the isolation boundary.