Dynamic design attributes for wafer inspection

Methods and systems for dynamic design attributes for wafer inspection are provided. One method includes, at run time of a wafer inspection recipe, prompting a user of a wafer inspection tool on which the wafer inspection recipe is performed for information for a design based binning (DBB) process....

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Bibliographische Detailangaben
Hauptverfasser:	Babulnath Raghav, Jayaraman Thirupurasundari
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY IMAGE DATA PROCESSING OR GENERATION, IN GENERAL INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
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Beschreibung
Zusammenfassung:	Methods and systems for dynamic design attributes for wafer inspection are provided. One method includes, at run time of a wafer inspection recipe, prompting a user of a wafer inspection tool on which the wafer inspection recipe is performed for information for a design based binning (DBB) process. The information includes one or more formulae for calculating design attributes from a design for a wafer. The design attributes are used to bin the defects in the DBB process. The method also includes performing inspection of a wafer according to an updated wafer inspection recipe. Performing the inspection includes binning defects detected on the wafer according to the DBB process in the updated wafer inspection recipe.