Memristor programming error reduction
Error reduction in memristor programming includes programming an n-th switched memristor of a switched memristor array with an error-corrected target resistance. The error-corrected target resistance is a function of a resistance error of the switched memristor array and a target resistance of the n...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | Error reduction in memristor programming includes programming an n-th switched memristor of a switched memristor array with an error-corrected target resistance. The error-corrected target resistance is a function of a resistance error of the switched memristor array and a target resistance of the n-th switched memristor. The n-th switched memristor programming is to reduce a total resistance error of the switched memristor array. |
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