Low latency scheduling on simultaneous multi-threading cores

A method is provided for prioritized hardware thread scheduling. The method includes, responsive to identifying a latency sensitive workload, enabling, by an operating system, one or more hardware threads to meet dispatch latency demands for the latency sensitive workload. The method further include...

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Bibliographische Detailangaben
Hauptverfasser: Warrier Suresh E, Mealey Bruce
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A method is provided for prioritized hardware thread scheduling. The method includes, responsive to identifying a latency sensitive workload, enabling, by an operating system, one or more hardware threads to meet dispatch latency demands for the latency sensitive workload. The method further includes responsive to detecting an absence of the latency sensitive workload, de-committing, by the operating system, the one or more hardware threads.