High voltage level shifter in ultra low power supply memory application
A high voltage level shifter includes a first high-voltage P-channel metal oxide semiconductor (HVPMOS) transistor, a second HVPMOS transistor, a discharge transistor having a first native high-voltage N-channel metal oxide semiconductor (HVNMOS) transistor and a first low-voltage N-channel metal ox...
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creator | Ni Hao Yu Hong Kwon Yi Jin Cheng Yu |
description | A high voltage level shifter includes a first high-voltage P-channel metal oxide semiconductor (HVPMOS) transistor, a second HVPMOS transistor, a discharge transistor having a first native high-voltage N-channel metal oxide semiconductor (HVNMOS) transistor and a first low-voltage N-channel metal oxide semiconductor (LVNMOS) transistor connected in series, and an avalanche transistor having a second HVNMOS transistor and a second LVNMOS transistor connected in series. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9768778B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9768778B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9768778B23</originalsourceid><addsrcrecordid>eNqNijEOgkAQAK-xMOof9gM2mnjYSlR6tSYbssAly-3mboHweyl8gNVkJrN1zyp0PUzChh0B00QMuQ-tUYIQYWRLCCwzqMxryqMqLzDQIGkBXCU0aEHi3m1a5EyHH3cOHvd3WR1Jpaas2FAkqz-vq78U3he30_mP5QsotDQ_</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>High voltage level shifter in ultra low power supply memory application</title><source>esp@cenet</source><creator>Ni Hao ; Yu Hong ; Kwon Yi Jin ; Cheng Yu</creator><creatorcontrib>Ni Hao ; Yu Hong ; Kwon Yi Jin ; Cheng Yu</creatorcontrib><description>A high voltage level shifter includes a first high-voltage P-channel metal oxide semiconductor (HVPMOS) transistor, a second HVPMOS transistor, a discharge transistor having a first native high-voltage N-channel metal oxide semiconductor (HVNMOS) transistor and a first low-voltage N-channel metal oxide semiconductor (LVNMOS) transistor connected in series, and an avalanche transistor having a second HVNMOS transistor and a second LVNMOS transistor connected in series.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170919&DB=EPODOC&CC=US&NR=9768778B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170919&DB=EPODOC&CC=US&NR=9768778B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Ni Hao</creatorcontrib><creatorcontrib>Yu Hong</creatorcontrib><creatorcontrib>Kwon Yi Jin</creatorcontrib><creatorcontrib>Cheng Yu</creatorcontrib><title>High voltage level shifter in ultra low power supply memory application</title><description>A high voltage level shifter includes a first high-voltage P-channel metal oxide semiconductor (HVPMOS) transistor, a second HVPMOS transistor, a discharge transistor having a first native high-voltage N-channel metal oxide semiconductor (HVNMOS) transistor and a first low-voltage N-channel metal oxide semiconductor (LVNMOS) transistor connected in series, and an avalanche transistor having a second HVNMOS transistor and a second LVNMOS transistor connected in series.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNijEOgkAQAK-xMOof9gM2mnjYSlR6tSYbssAly-3mboHweyl8gNVkJrN1zyp0PUzChh0B00QMuQ-tUYIQYWRLCCwzqMxryqMqLzDQIGkBXCU0aEHi3m1a5EyHH3cOHvd3WR1Jpaas2FAkqz-vq78U3he30_mP5QsotDQ_</recordid><startdate>20170919</startdate><enddate>20170919</enddate><creator>Ni Hao</creator><creator>Yu Hong</creator><creator>Kwon Yi Jin</creator><creator>Cheng Yu</creator><scope>EVB</scope></search><sort><creationdate>20170919</creationdate><title>High voltage level shifter in ultra low power supply memory application</title><author>Ni Hao ; Yu Hong ; Kwon Yi Jin ; Cheng Yu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9768778B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>Ni Hao</creatorcontrib><creatorcontrib>Yu Hong</creatorcontrib><creatorcontrib>Kwon Yi Jin</creatorcontrib><creatorcontrib>Cheng Yu</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ni Hao</au><au>Yu Hong</au><au>Kwon Yi Jin</au><au>Cheng Yu</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>High voltage level shifter in ultra low power supply memory application</title><date>2017-09-19</date><risdate>2017</risdate><abstract>A high voltage level shifter includes a first high-voltage P-channel metal oxide semiconductor (HVPMOS) transistor, a second HVPMOS transistor, a discharge transistor having a first native high-voltage N-channel metal oxide semiconductor (HVNMOS) transistor and a first low-voltage N-channel metal oxide semiconductor (LVNMOS) transistor connected in series, and an avalanche transistor having a second HVNMOS transistor and a second LVNMOS transistor connected in series.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE |
title | High voltage level shifter in ultra low power supply memory application |
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