System and method for dram-less SSD data protection during a power failure event

A solid-state drive (SSD) may not include a dynamic random access memory (DRAM) but rather may utilize a host memory buffer of system random access memory (RAM). During a power failure data on dirty cache lines may be lost. A power protection caching policy may be implemented where an SSD controller is capable of accepting a flush cache signal, which may be a signal to a redefined pin of the SSD or a command, from a controller of the information handling system. The controller may utilize a slope detect mechanism and/or a power good detect mechanism to detect a power failure and if a power failure is detected to issue a flush cache signal the SSD controller to cause a flush of all dirty cache lines from the host memory buffer before the power failure results in inoperability of circuitry associated with the dirty cache lines.