Method of forming key patterns and method of fabricating a semiconductor device using the same

Provided are a method of forming key patterns and a method of fabricating a semiconductor device using the same. The method of forming key patterns may include forming gate and key patterns on a cell region and a scribe lane region, respectively. Here, the key patterns may be formed to have a large...

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Hauptverfasser:	Shin Heeju, Baek Jonghwa, Lee Hyunchang, Bae Yongkug, Jung Rankyung, Ham Boo-Hyun, Koo Ja-Min
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	Shin Heeju Baek Jonghwa Lee Hyunchang Bae Yongkug Jung Rankyung Ham Boo-Hyun Koo Ja-Min
description	Provided are a method of forming key patterns and a method of fabricating a semiconductor device using the same. The method of forming key patterns may include forming gate and key patterns on a cell region and a scribe lane region, respectively. Here, the key patterns may be formed to have a large width and a larger pitch than those of the gate patterns.
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fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9704721B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9704721B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9704721B23</originalsourceid><addsrcrecordid>eNqNyr0KwjAUhuEsDqLew7kBQatQXBXFxUldLcfkSxs0PySngncvBcHV6R3eZ6xuJ0gXDUVLNmbvQksPvCmxCHIoxMGQ_xG-Z6dZBsZU4J2OwfRaYiaDl9OgvgxTOlBhj6kaWX4WzL6dKDrsL7vjHCk2KIk1AqS5njf1Yl1Xy221-oN8AKEiPBU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of forming key patterns and method of fabricating a semiconductor device using the same</title><source>esp@cenet</source><creator>Shin Heeju ; Baek Jonghwa ; Lee Hyunchang ; Bae Yongkug ; Jung Rankyung ; Ham Boo-Hyun ; Koo Ja-Min</creator><creatorcontrib>Shin Heeju ; Baek Jonghwa ; Lee Hyunchang ; Bae Yongkug ; Jung Rankyung ; Ham Boo-Hyun ; Koo Ja-Min</creatorcontrib><description>Provided are a method of forming key patterns and a method of fabricating a semiconductor device using the same. The method of forming key patterns may include forming gate and key patterns on a cell region and a scribe lane region, respectively. Here, the key patterns may be formed to have a large width and a larger pitch than those of the gate patterns.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170711&DB=EPODOC&CC=US&NR=9704721B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25568,76551</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170711&DB=EPODOC&CC=US&NR=9704721B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Shin Heeju</creatorcontrib><creatorcontrib>Baek Jonghwa</creatorcontrib><creatorcontrib>Lee Hyunchang</creatorcontrib><creatorcontrib>Bae Yongkug</creatorcontrib><creatorcontrib>Jung Rankyung</creatorcontrib><creatorcontrib>Ham Boo-Hyun</creatorcontrib><creatorcontrib>Koo Ja-Min</creatorcontrib><title>Method of forming key patterns and method of fabricating a semiconductor device using the same</title><description>Provided are a method of forming key patterns and a method of fabricating a semiconductor device using the same. The method of forming key patterns may include forming gate and key patterns on a cell region and a scribe lane region, respectively. Here, the key patterns may be formed to have a large width and a larger pitch than those of the gate patterns.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyr0KwjAUhuEsDqLew7kBQatQXBXFxUldLcfkSxs0PySngncvBcHV6R3eZ6xuJ0gXDUVLNmbvQksPvCmxCHIoxMGQ_xG-Z6dZBsZU4J2OwfRaYiaDl9OgvgxTOlBhj6kaWX4WzL6dKDrsL7vjHCk2KIk1AqS5njf1Yl1Xy221-oN8AKEiPBU</recordid><startdate>20170711</startdate><enddate>20170711</enddate><creator>Shin Heeju</creator><creator>Baek Jonghwa</creator><creator>Lee Hyunchang</creator><creator>Bae Yongkug</creator><creator>Jung Rankyung</creator><creator>Ham Boo-Hyun</creator><creator>Koo Ja-Min</creator><scope>EVB</scope></search><sort><creationdate>20170711</creationdate><title>Method of forming key patterns and method of fabricating a semiconductor device using the same</title><author>Shin Heeju ; Baek Jonghwa ; Lee Hyunchang ; Bae Yongkug ; Jung Rankyung ; Ham Boo-Hyun ; Koo Ja-Min</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9704721B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Shin Heeju</creatorcontrib><creatorcontrib>Baek Jonghwa</creatorcontrib><creatorcontrib>Lee Hyunchang</creatorcontrib><creatorcontrib>Bae Yongkug</creatorcontrib><creatorcontrib>Jung Rankyung</creatorcontrib><creatorcontrib>Ham Boo-Hyun</creatorcontrib><creatorcontrib>Koo Ja-Min</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Shin Heeju</au><au>Baek Jonghwa</au><au>Lee Hyunchang</au><au>Bae Yongkug</au><au>Jung Rankyung</au><au>Ham Boo-Hyun</au><au>Koo Ja-Min</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of forming key patterns and method of fabricating a semiconductor device using the same</title><date>2017-07-11</date><risdate>2017</risdate><abstract>Provided are a method of forming key patterns and a method of fabricating a semiconductor device using the same. The method of forming key patterns may include forming gate and key patterns on a cell region and a scribe lane region, respectively. Here, the key patterns may be formed to have a large width and a larger pitch than those of the gate patterns.</abstract><oa>free_for_read</oa></addata></record>
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subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
title	Method of forming key patterns and method of fabricating a semiconductor device using the same
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-17T09%3A20%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Shin%20Heeju&rft.date=2017-07-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9704721B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true