Semiconductor device

A semiconductor device of trench gate type is provided that has achieved both large on-current and high off-state breakdown voltage. Around trench T and between it and electric field relaxation p-layer 16, low resistance n-layer 17 is provided. Low resistance n-layer 17 is formed deeper than trench T, and shallower than electric field relaxation p-layer 16, being connected to n−-layer (drift layer) 12 just thereunder, and thus low resistance n-layer 17 and n−-layer 12 are integrated to form a drift layer. Although low resistance n-layer 17 is n-type as is n−-layer 12, donor concentration thereof is set higher than that of n−-layer 12, thereby low resistance n-layer 17 having a resistivity lower than that of n−-layer 12. This low resistance n-layer 17 is provided in on-current path (between electric field relaxation p-layer 16 and trench T), whereby low resistance n-layer 17 can lower the resistance to on-current.