Vertical transistor and variable resistive memory device including the same

A vertical transistor may include a pillar, a gate and an electric field-buffering region. The pillar may be vertically extended from a surface of a semiconductor substrate. The pillar may include a source, a channel region and a drain. The gate may be formed on an outer surface of the pillar. The gate may be overlapped with the channel region, a portion of the source configured to make contact with the channel region, and a portion of the drain configured to make contact with the channel region. The electric field-buffering region may be formed in the portion of the drain overlapped with the gate. The electric field-buffering region may have a band gap different from a band gap of a material in the pillar.