Peripheral register parameter refreshing
Systems, methods, circuits and computer-readable mediums for peripheral sequencing using an access sequence are disclosed. In some implementations, a control register and status register in a peripheral are initialized with control data for selecting peripheral registers of the peripheral to be refr...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | Systems, methods, circuits and computer-readable mediums for peripheral sequencing using an access sequence are disclosed. In some implementations, a control register and status register in a peripheral are initialized with control data for selecting peripheral registers of the peripheral to be refreshed during an access sequence. For each peripheral register to be refreshed during the access sequence: a data register of the peripheral register is accessed; the peripheral register is refreshed; and the status register is updated with a current status of the access sequence. The access sequence is determined to be completed based on contents of the status register. |
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