Semiconductor structure and process for forming plug including layer with pulled back sidewall part
A semiconductor process for forming a plug includes the following steps. A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titani...
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creator | Chen Pin-Hong Hsu Chia Chang Hsu Chi-Mao Huang Shu Min Lai Kuo-Chih Chiu Chun-Chieh Huang Hsin-Fu Chen Li-Han Tsai Min-Chuan |
description | A semiconductor process for forming a plug includes the following steps. A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titanium nitride layer having first sidewall parts. The first sidewall parts of the first titanium nitride layer are pulled back, thereby second sidewall parts being formed. A second titanium nitride layer is formed to cover the recess. Moreover, a semiconductor structure formed by said semiconductor process is also provided. |
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A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titanium nitride layer having first sidewall parts. The first sidewall parts of the first titanium nitride layer are pulled back, thereby second sidewall parts being formed. A second titanium nitride layer is formed to cover the recess. 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Moreover, a semiconductor structure formed by said semiconductor process is also provided.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNiksKwkAQRLNxIeod-gIuNKBmqyjuo-vQ9nTiYGemmQ_B2zuCB3BR1CtezStqebTkncmUfICYQoEcGNAZ0OCJY4S-mJLRugFU8gDWkWTznYJvDjDZ9ATNImzggfSCaA1PKAKKIS2rWY8SefXrRQWX8-10XbP6jqMisePU3dtmt28Om_q4rf-4fACWqD7-</recordid><startdate>20170613</startdate><enddate>20170613</enddate><creator>Chen Pin-Hong</creator><creator>Hsu Chia Chang</creator><creator>Hsu Chi-Mao</creator><creator>Huang Shu Min</creator><creator>Lai Kuo-Chih</creator><creator>Chiu Chun-Chieh</creator><creator>Huang Hsin-Fu</creator><creator>Chen Li-Han</creator><creator>Tsai Min-Chuan</creator><scope>EVB</scope></search><sort><creationdate>20170613</creationdate><title>Semiconductor structure and process for forming plug including layer with pulled back sidewall part</title><author>Chen Pin-Hong ; Hsu Chia Chang ; Hsu Chi-Mao ; Huang Shu Min ; Lai Kuo-Chih ; Chiu Chun-Chieh ; Huang Hsin-Fu ; Chen Li-Han ; Tsai Min-Chuan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9679813B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Chen Pin-Hong</creatorcontrib><creatorcontrib>Hsu Chia Chang</creatorcontrib><creatorcontrib>Hsu Chi-Mao</creatorcontrib><creatorcontrib>Huang Shu Min</creatorcontrib><creatorcontrib>Lai Kuo-Chih</creatorcontrib><creatorcontrib>Chiu Chun-Chieh</creatorcontrib><creatorcontrib>Huang Hsin-Fu</creatorcontrib><creatorcontrib>Chen Li-Han</creatorcontrib><creatorcontrib>Tsai Min-Chuan</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen Pin-Hong</au><au>Hsu Chia Chang</au><au>Hsu Chi-Mao</au><au>Huang Shu Min</au><au>Lai Kuo-Chih</au><au>Chiu Chun-Chieh</au><au>Huang Hsin-Fu</au><au>Chen Li-Han</au><au>Tsai Min-Chuan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor structure and process for forming plug including layer with pulled back sidewall part</title><date>2017-06-13</date><risdate>2017</risdate><abstract>A semiconductor process for forming a plug includes the following steps. A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titanium nitride layer having first sidewall parts. The first sidewall parts of the first titanium nitride layer are pulled back, thereby second sidewall parts being formed. A second titanium nitride layer is formed to cover the recess. Moreover, a semiconductor structure formed by said semiconductor process is also provided.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor structure and process for forming plug including layer with pulled back sidewall part |
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