Imaging circuit including frame asynchronous pulse detection

A pulse detecting imaging circuit includes a pixel array including multiple pixels arranged in at least one row and at least one column. The pixel array includes multiple row voltages and column voltages. Each of the row voltages is connected to each pixel in the corresponding row and each of the column voltages is connected to each pixel in the corresponding column. Each of said pixels includes an imaging circuit and a pulse detection circuit. An output of each pulse detection circuit is connected to a corresponding row voltage and a corresponding column voltage such that each pixel is configured to connect the corresponding row voltage and the corresponding column voltage to a ground or a known driven voltage in response to a pulse detection at the pixel.