Semiconductor device and process

A metal first, via first process for forming interconnects within a metallization layer of a semiconductor device is provided. In an embodiment a conductive material is deposited and the conductive material is patterned into a conductive line and a via. A dielectric material is deposited over the co...

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Bibliographische Detailangaben
Hauptverfasser: Lin Tien-Lu, Wang Yung-Chih, Liao Yu-Chieh, Kao Hsiang-Lun
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A metal first, via first process for forming interconnects within a metallization layer of a semiconductor device is provided. In an embodiment a conductive material is deposited and the conductive material is patterned into a conductive line and a via. A dielectric material is deposited over the conductive line and the via, and the dielectric material and the via are planarized.