Apparatus and methods for reducing glitches in digital step attenuators

Apparatus and methods for reducing glitches in digital step attenuators

Apparatus and methods for reducing glitches in digital step attenuators are disclosed. By configuring a multi-bit DSA such that an attenuation control block changes a plurality of control signals in a manner sequencing individual switches of the DSA, glitches can be reduced and RF signal behavior ca...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Atesal Yusuf Alperen, Katzin Peter J
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
PULSE TECHNIQUE
RESONATORS
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Beschreibung
Zusammenfassung:Apparatus and methods for reducing glitches in digital step attenuators are disclosed. By configuring a multi-bit DSA such that an attenuation control block changes a plurality of control signals in a manner sequencing individual switches of the DSA, glitches can be reduced and RF signal behavior can be enhanced. The sequence, based upon a unit time delay, causes the transient attenuation value to be bounded between a minimum and maximum and can improve settling time.