Atomic operations in PCI express

A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Messa...

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Hauptverfasser: Tamari Eran, Falik Ohad, Akiyama James, Rosenbluth Mark B, Blankenship Robert G, Das Sharma Debendra, Bhatt Ajay V, Muthrasanallur Sridhar, Rodgers Scott Dion, Mendelson Avi, Pardo Ilan, Harriman David J, Ajanovic Jasmin, Vasudevan Anil, Weissmann Eliezer, Barry Peter, Sethi Prashant, Wagh Mahesh, Shamia Doron
Format: Patent
Sprache:eng
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Zusammenfassung:A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.