Multiple split rail standard cell library architecture
A MOS device includes first and second sets of power rails. The first set of power rails extends across the MOS device and includes at least two power rails for providing a first voltage to the MOS device. The first set of power rails is interior to an edge of a cell boundary in the MOS device. At l...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A MOS device includes first and second sets of power rails. The first set of power rails extends across the MOS device and includes at least two power rails for providing a first voltage to the MOS device. The first set of power rails is interior to an edge of a cell boundary in the MOS device. At least one power rail of the first set of power rails extends over a pMOS active region of the MOS device. The second set of power rails extends across the MOS device and includes at least two power rails for providing a second voltage to the MOS device. The second set of power rails is interior to an edge of the cell boundary in the MOS device. At least one power rail of the second set of power rails extends over an nMOS active region of the MOS device. |
---|