Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines

A three-dimensional array especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substr...

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Bibliographische Detailangaben
1. Verfasser:	Samachisa George
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE MANUFACTURE OR TREATMENT OF NANOSTRUCTURES MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES NANOTECHNOLOGY PERFORMING OPERATIONS PHYSICS SEMICONDUCTOR DEVICES SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES STATIC STORES TRANSPORTING
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Beschreibung
Zusammenfassung:	A three-dimensional array especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. Bit lines to which the memory elements of all planes are connected are oriented vertically from the substrate and through the plurality of planes.