Memory protection circuit, method and processing unit utilizing memory access information register to selectively allow access to memory areas by virtual machines

A memory protection circuit includes a memory access information register that stores memory access information related to memory areas which can be accessed by respective virtual machines, and an access determination circuit that determines whether to allow the virtual machines to access the memory areas based on a memory address when each of the virtual machines accesses a memory, information related to the virtual machines that access the memory, and the memory access information stored in the memory access information register. The memory access information register may comprise memory area setting registers and memory area allocation registers. A register access information register may indicate register areas which can be accessed by the virtual machines. A virtual machine scheduler or thread scheduler may determine an order of instructions to be executed.