Memory device

A memory device may include a plurality of word lines each word line being operably coupled to one or more memory cells; a peripheral circuit suitable for performing first and second refresh operations to the plurality of word lines; wherein the first refresh operation is suitable for preserving sto...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Chun Jun-Hyun, Kim Kwi-Dong
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A memory device may include a plurality of word lines each word line being operably coupled to one or more memory cells; a peripheral circuit suitable for performing first and second refresh operations to the plurality of word lines; wherein the first refresh operation is suitable for preserving stored data for a majority of the memory cells of the memory device and the second refresh operation is suitable for preserving stored data of one or more weak memory cells.