Resistive memory apparatus having hierarchical bit line structure
A resistive memory apparatus includes a plurality of bit lines, a plurality of local bit lines, and a plurality of global bit lines. The plurality of bit lines is electrically coupled to a plurality of memory cells. The plurality of local bit lines are extended in a row direction, and electrically c...
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| Sprache: | eng |
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| Zusammenfassung: | A resistive memory apparatus includes a plurality of bit lines, a plurality of local bit lines, and a plurality of global bit lines. The plurality of bit lines is electrically coupled to a plurality of memory cells. The plurality of local bit lines are extended in a row direction, and electrically coupled to one or more of the plurality of bit lines. The plurality of global bit lines are extended in the column direction, and electrically coupled to one or more of the plurality of local bit lines. |
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