Selective local metal cap layer formation for improved electromigration behavior

A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD); masking selected regions of the one or more copper lines; selectively plating metal cap regions over exposed regions of the one or more coppe...

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Bibliographische Detailangaben
Hauptverfasser: Bonilla Griselda, Filippi Ronald G, Dyer Thomas W, Choi Samuel S, Angyal Matthew S, Lustig Naftali E, Bao Junjing, Simon Andrew H, Culp James A, Greco Stephen E
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD); masking selected regions of the one or more copper lines; selectively plating metal cap regions over exposed regions of the one or more copper lines; and forming a conformal insulator layer over the metal cap regions and uncapped regions of the one or more copper lines.