Resistive random access memory and manufacturing method thereof

A resistive random access memory including a substrate, a dielectric layer, and at least one memory cell string is provided. The dielectric layer is disposed on the substrate. The memory cell string includes memory cells and at least one first interconnect structure. The memory cells are vertically and adjacently disposed in the dielectric layer, and each memory cells includes a first conductive line, a second conductive line, and a variable resistance structure. The second conductive line is disposed at one side of the first conductive line, and the top surface of the second conductive line is higher than the top surface of the first conductive line. The variable resistance structure is disposed between the first conductive line and the second conductive line. The variable resistance structures in the vertically adjacent memory cells are isolated from each other. The first interconnect structure is connected to the vertically adjacent first conductive lines.