Method and system for reducing thermal load by forced power collapse

A system and method for reducing heat in a portable computing device includes clocking a processor such that it is provided with a full frequency over time t0 to t1. A timer is set to trigger a forced power collapse ("FPC") that removes all power to the processor from time t1 to time t2. A...

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Bibliographische Detailangaben
Hauptverfasser:	SALSBERY BRIAN, MEDRANO CHRISTOPHER LEE
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS PHYSICS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE
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Beschreibung
Zusammenfassung:	A system and method for reducing heat in a portable computing device includes clocking a processor such that it is provided with a full frequency over time t0 to t1. A timer is set to trigger a forced power collapse ("FPC") that removes all power to the processor from time t1 to time t2. At time t2, the processor may be awakened such that it can resume processing at the full frequency. Advantageously, during the FPC, no leakage power ("PL") is consumed by the processor between t1 and t2. The result is that the processor averages the same processing efficiency over time t0 to t2 as it otherwise would have if a reduced frequency had been provided to it. However, because no PL was consumed during the FPC, the generation of heat between time t1 and t2 that is related to PL is avoided.