Methods and devices for determining logical to physical mapping on an integrated circuit

Methods and devices for mapping logical addresses to physical locations on an integrated circuit die are disclosed herein. An embodiment of the method includes fabricating a die, where the die has a plurality of bits that are electrically accessible by way of logical addresses. A plurality of bits h...

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Bibliographische Detailangaben

Hauptverfasser:	KASPER ABHA SINGH, WAITE HAROLD C, PLUMTON DONALD L, RULLAN ERIC D, ASHBURN STANTON PETREE, CORUM DANIEL L, PRINSLOW DOUGLAS A
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES STATIC STORES TESTING
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